FPGA Technology at Crossroads

Field Programmable Gate Arrays (FPGAs) have been undergoing rapid and dramatic changes fueled by their expanding use in datacenter computing. Rather than serving as a compromise or alternative to ASICs, FPGA ‘programmable logic’ is emerging as a third paradigm of compute that stands apart from traditional hardware vs. software archetypes. A multi-university, multi-disciplinary team has been formed behind the question:

What should be the future role of FPGAs as a central function in datacenter servers?

Guided by both the demands of modern networked, data-centric computing and the new capabilities from 3D integration, the Intel/VMware Crossroads 3D-FPGA Academic Research Center will investigate a new programmable hardware data-nexus lying at the heart of the server and operating over data ‘on the move’ between network, traditional compute, and storage elements.

The Intel/VMware Crossroads 3D-FPGA Academic Research Center is jointly supported by Intel and VMware. The center is committed to public and free dissemination of its research outcome.


You can find an overview presentation on the center’s YouTube channel. Please contact any of the Crossroads PIs in your research area if you have any questions or interest.

If you are looking for an introductory overview on FPGAs, you may find the first 4 lectures from this course useful. Please see FPGA Architecture: Principles and Progression by Boutros and Betz for a technical overview article. You can find a wide range of FPGA topics presented to different skill levels on this Intel YouTube Channel.


Latest News

February 2022 | Intel’s Corporate Research Council recognizes Crossroads Center PIs Sherry, Sekar and Hoe with 2021 Outstanding Researcher Awards for their work on the Pigasus FPGA-Accelerated Intrusion Detection and Prevention System. Pigasus inspects 100k+ concurrent connections against 10k+ SNORT rules at 100 Gbps in a single server form factor by handling common-case processing… read more

February 2022 | Intel’s Corporate Research Council recognizes Crossroads Center PIs Sherry, Sekar and Hoe with 2021 Outstanding Researcher Awards for their work on the Pigasus FPGA-Accelerated Intrusion Detection and Prevention System. Pigasus inspects 100k+ concurrent connections against 10k+ SNORT rules at 100 Gbps in a single server form factor by handling common-case processing in an Intel FPGA SmartNIC. Pigasus was developed by former CMU PhD student Dr. Zhipeng Zhao in his dissertation on efficient acceleration of irregular, data-dependent stream processing. Today, Pigasus is a focus application driver for many technologies under research by the Crossroads Center. Pigasus has gained broad interest as an open-sourced project with a growing academic and industrial user and developer community. (Read Less)


December, 2021 | Mohamed Ibrahim successfully defended his MASc thesis at the University of Toronto. His thesis detailed enhancements to the HPIPE FPGA-based CNN accelerator to perform object detection and to span multiple FPGAs for higher performance. Mohamed developed an automatic partitioning algorithm that allows HPIPE accelerators to achieve higher parallelism by… read more

December, 2021 | Mohamed Ibrahim successfully defended his MASc thesis at the University of Toronto. His thesis detailed enhancements to the HPIPE FPGA-based CNN accelerator to perform object detection and to span multiple FPGAs for higher performance. Mohamed developed an automatic partitioning algorithm that allows HPIPE accelerators to achieve higher parallelism by spanning multiple FPGAs. Both performance models and deployment on a multi-Stratix-10 system in James Hoe’s group at CMU showed near-linear speedup as the FPGA count increased. Mohamed will join Intel’s Deep Learning Accelerator team in February. (Read Less)


December 2021 | The paper “Specializing for Efficiency: Customizing AI Inference Processors on FPGAs,” by by Andrew Boutros, Vaughn Betz (University of Toronto) and Eriko Nurvitadhi (Intel) received the “Third Paper Award” from the IEEE International Conference on Microelectronics. This work showed that specializing NPU accelerators to workload classes improves performance by 9% to 35% while simultaneously reducing resource usage … read more

December 2021 | The paper “Specializing for Efficiency: Customizing AI Inference Processors on FPGAs,” by by Andrew Boutros, Vaughn Betz (University of Toronto) and Eriko Nurvitadhi (Intel) received the “Third Paper Award” from the IEEE International Conference on Microelectronics. This work showed that specializing NPU accelerators to workload classes improves performance by 9% to 35% while simultaneously reducing resource usage by 23% to 44%. Andrew is currently augmenting the SystemC NPU model to investigate dividing the NPU into modular latency-insensitive components; this will enable investigation of Crossroads FPGA architecture ideas that include linking components and accelerators with a (latency-insensitive) NoC. (Read Less)


[Find all News here]


Recent Publications

  • SurgeProtector: Mitigating Temporal Algorithmic Complexity Attacks using Adversarial Scheduling [paper]

    Atre, N., Sadok, H., Chiang, E., Wang, W., and Sherry, J. SurgeProtector: Mitigating Temporal Algorithmic Complexity Attacks using Adversarial Scheduling. In Proceedings of the 2022 Conference of the ACM Special Interest Group on Data Communication (SIGCOMM).

  • RLPlace: Using Reinforcement Learning and Smart Perturbations to Optimize FPGA Placement

    Elgammal, M., Murray, K., and Betz, V. RLPlace: Using Reinforcement Learning and Smart Perturbations to Optimize FPGA Placement. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

  • RAD-Sim: Rapid Architecture Exploration for Novel Reconfigurable Acceleration Devices

    Boutros, A., Nurvitadhi, E., and Betz. V. RAD-Sim: Rapid Architecture Exploration for Novel Reconfigurable Acceleration Devices. In Proceedings of Int. Conf. on Field-Programmable Logic and Applications.

[Find all Publications and Downloads here]