Crossroads FPGA Seminars Online

The Crossraods FPGA Seminar Series aims to offer high-quality 1-hour FPGA research presentations in an online format open to all interested. Seminars will be delivered over Zoom with live Q&A.

Please see the seminar listings page for more details on how to be a part of this. Remember to tell a friend.

If you have suggestions for speakers and topics in the FPGA field, please contact the volunteer organizers.

The Crossroads seminars has its origin in the former Intel/VMware Crossroads 3D-FPGA Academic Research Center.

Upcoming Seminars

Friday, October 16, 2026 | 1pm~2pm ET

Zoom

Hypothesizing Autonomous Accelerator Design
Zhiru Zhang, Cornell University

Abstract: The emergence of AI agents raises an intriguing question: can we fully automate the accelerator development process? While agentic software engineering has shown remarkable progress, directly extending existing approaches to hardware remains challenging. Unlike software, accelerator development is constrained by two major bottlenecks. First, current hardware design methodologies rely on costly modeling, synthesis, and implementation flows that can require hours to days for a single iteration. Second, each new accelerator often requires substantial manual effort to construct and optimize the accompanying software stack. Together, these bottlenecks fundamentally limit the rate at which designers and AI agents can explore the hardware-software co-design space.

This talk explores the hypothesis of autonomous accelerator design, and shares results and lessons learned from our recent work on (1) new abstractions that help unify accelerator design and programming, (2) differentiable compiler optimization, and (3) agentic approaches to compiler construction. I will discuss how these directions may collectively move us closer to a future of more autonomous accelerator design. I will discuss how these directions may collectively move us closer to a future of more autonomous accelerator design.

Bio: Zhiru Zhang is a Professor in the School of ECE at Cornell University. His current research investigates new algorithms, design methodologies, and automation tools for heterogeneous computing. Dr. Zhang is an IEEE Fellow and has been honored with the Intel Outstanding Researcher Award, AWS AI Amazon Research Award, Facebook Research Award, Google Faculty Research Award, DAC Under-40 Innovators Award, DARPA Young Faculty Award, IEEE CEDA Ernest S. Kuh Early Career Award, and NSF CAREER Award. He has also received 10+ best paper awards from premier conferences and journals in computer systems and EDA. He has founded or helped build several successful startups. Most notably, he co-founded AutoESL, an HLS startup acquired by Xilinx (now part of AMD). AutoESL's technology became Vivado HLS (now Vitis HLS), the most widely-used HLS tool for FPGA accelerator design.

Friday, October 23, 2026 | 1pm~2pm ET

Zoom

Benchmarking LLMs and Agents for High-Level Hardware Design
Stefan Abi-Karam, Georgia Tech

Abstract: High-level synthesis (HLS) is a popular workflow for developing domain-specific hardware accelerators for FPGAs and ASICs. While LLMs and AI agents are increasingly used in hardware design, most work focuses on HDL/RTL and below, leaving their potential for rapid, optimized HLS design less explored. HLS’s higher abstraction level could allow models and agents to focus more on higher-level hardware exploration and less on microarchitectural details.

This talk presents our efforts to benchmark LLMs and AI agents for HLS design tasks through HLS-Eval, our AI-for-HLS benchmark and benchmarking infrastructure. HLS-Eval provides standard design generation and editing tasks, HLS designs as benchmark cases, and an API for defining custom tasks, evaluation methodologies, and HLS tool interfaces. We present zero-shot, inference scaling, and agentic evaluations of our HLS design tasks, alongside preliminary results for new benchmark tasks for the next iteration of HLS-Eval. These new tasks include design auto-parameterization, design auto-translation, workload testbench generation, HLS–RTL decompilation, and HLS performance modeling / world model probing.

These evaluations assess the performance, cost, and runtime behavior of different models and agents across HLS design tasks, providing insights into how to better co-design HLS/EDA tools and AI approaches to hardware design.

Bio: Stefan Abi-Karam is a PhD student advised by Prof. Callie Hao at Georgia Tech and a full-time research faculty member in the Hardware Society and Trust division at the Georgia Tech Research Institute.

Stefan’s research focuses on AI for hardware design and acceleration, particularly the use of LLMs and agents for high-level synthesis design. He also works on using AI to optimize EDA tools, deep learning for EDA tasks, and hardware security and verification. His work has earned multiple honors, including selection for the first cohort of LLM-aided design (LAD) fellowship, the MLCAD Best Paper Award, and the FPL Community Award.

Stefan is graduating this semester and is on the academic job market, seeking tenure-track faculty positions while planning to pursue a postdoc. He is more than happy to discuss faculty or postdoc opportunities.

FPGA Technology at Crossroads