RV4: EDA for 3D FPGAs

To best exploit the new capabilities afforded by 3D integration and to enable the Crossroads 3D-FPGA concept in which FPGAs can form the center of a server, we need flexible CAD tools which can quickly be retargeted to evaluate new architecture ideas. These tools should be capable of modeling both diverse function blocks (logic, RAM, DSP, customized accelerators, etc.) and diverse interconnect structures (traditional within-die interconnect of various types, FPGA-like interconnect that spans dies and has different electrical characteristics, and a variety of embedded NoC options). To ensure accurate conclusions, these tools must also generate high-quality results and use detailed models of the physical implementation. Finally, as 3D FPGAs will scale to unprecedented capacity, the tools must employ highly scalable algorithms so we can evaluate many architecture variants in a reasonable runtime, and so that we have a path to fast CAD tools for the best (chosen) architectures found in RV3.

RV4 PIs: Vaughn Betz and David Pan